- BCA Projects
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E- Quality Fresh×
E- Quality Fresh
The title of the project is “Implementation of food products quality check using sensors”.
In recent years, food product exports to the developed country markets have emerged as a potential major source of export growth for many developed countries
Losses resulting from inadequate post-harvest handling, storage and distribution result in diminished returns for producing countries. In the last years, international markets have rejected exports of fruits and vegetables containing non-authorized pesticides, with pesticide residues exceeding permissible limits, with inadequate labeling and packaging requirements, with contaminants exceeding regulatory levels, without the required nutritional information and/or with inadequate general quality.
Most of the products are not been maintained with the good quality. This project provides quality check-up for a commodity using sensors. Customers can easily buy required commodity through online. The products that have been checked for the quality using sensors enhanced further for customer purchase.
Online Discussion Forum×
Online Discussion Forum
ODF is designed in such a way that the whole forum structure is fully intertwined and tangled within itself. This makes the forum structure very difficult to empathize. Though it is difficult to comprehend, it can easily be adaptable to any type of or nature of discussion forum. Make it available across other platforms, without inflicting changes in the code. It can be GUI presented, and allow handling of events through mouse. New modules can be designed, without effecting existing modules. An Internet forum, or message board, is an online discussion site where people can hold conversations in the form of posted messages. They differ from chat rooms in that messages are often longer than one line of text, and are at least temporarily archived. Also, depending on the access level of a user or the forum set-up, a posted message might need to be approved by a moderator before it becomes visible.
Forums have a specific set of jargon associated with them; e.g. a single conversation is called a "thread", ortopic.
Quadcopter Model Q2×
Quadcopter Model Q2
CITL Quad Copter M2
Photo DescriptionSize: 410x410x140mmMaterial: glass fiberWeight: 430gMax Paylaod: 380gFlight time: about 25minPropeller: 8inchMotor: C2208 KV900Without altitude hold M2 Spare Parts M2 camera mount B2 charger M2 propeller M2 propeller clip M2 motor M2 arm M2 landing gear 3S 2200mAh battery
We one of the best models available and all tested for its working.CITL-TECH Varsity in Bangalore offers the best training and model building workshops to all the hobbyists,engineering students who are interested in developing the moules.now we have released the GPS based quadcoptors where it is having the feature of auto return home .A quadcopter, also called a quadrotor helicopter, quadrocopter, quadrotor,is a multicopter that is lifted and propelled by four rotors.
Electronic Toll Collection (ETC)×
Electronic Toll Collection (ETC)
The Electronic Toll Collection (ETC) is designed to determine if a car is registered in a toll payment program,alert enforcers of toll payment violations, and debit the participating account. With ETC, these transactions can be performed while vehicles travel at near highway cruising speed. ETC is fast becoming a globally accepted method of toll collection, a trend greatly aided by the growth of interoperable ETC technologies. Technologies used in ETC are Automatic Vehicle Identification (AVI), Automatic Vehicle Classification (AVC), Video Enforcement Systems (VES) and Vehicle Positioning System (VPS).ETC systems are deployed in the following cities in India: Delhi, Mumbai, Kolkata, and Chennai.
Eye ball Sensor for automatic Wheel Chair for paralyzed patients×
Eye ball Sensor for automatic Wheel Chair for paralyzed patients
This intelligent chair is designed to help the paralysed person who moves on a wheel chair, instead of the handicapped person moves the wheel chair by his hand, the chair will automatically move to a particular direction as the patient moves his eyes towards a direction, with the help of Eye ball movement detection sensor. The chair will also sense the obstacles in front of it and gives a beep sound.
Design and implementation of demodulation technique with complex dpll using cordic algorithm×
Design and implementation of demodulation technique with complex dpll using cordic algorithm
CORDIC (Coordinate Rotation Digital Computer) is a simple and efficient algorithm to calculate hyperbolic and trigonometric functions. It is commonly used when no multiplier hardware is available (e.g., simple micro-controllers and FPGAs). The only operations it requires are addition, subtraction, bit shift and lookup table. The pipelined architecture for coordinate rotation algorithm for the computation of loop performance of complex Digital Phase Locked Loop (DPLL) in In-phase and quadrature channel receiver is designed.
The design of CORDIC in the vector rotation mode results in high system throughput due to its pipe-lined architecture where latency is reduced in each of the pipelined stage. For on-chip application, the area reduction in the proposed design can be achieved through optimization in the number of micro rotations. For better loop performance of
first order complex DPLL and to minimize quantization error, the number of iterations are also optimized.
A New Approach for High Performance and Efficient Design of CORDIC Processor×
A New Approach for High Performance and Efficient Design of CORDIC Processor
This paper presents a new approach for the high performance and hardware efficient design of coordinate rotation digital computer (CORDIC) processor structure. The proposed design approach completely eliminates the ROM requirement of constant arctangent values. Furthermore, efficient designs of carry look ahead adders (CLAs), exploiting one input as constant, in the angle adder/subtractor datapath speeds-up the computation while maintaining regularity. The proposed architecture is implemented in FPGA as well as in 180nm standard cell library. The proposed implementation has about 39% delay improvement in FPGA and about 34% delay improvement in standard cell technology as compared to basic structure. About 47% power savings has been achieved in the proposed structure.
Design of Plural-Multiplier Based on CORDIC Algorithm for FFT Application×
Design of Plural-Multiplier Based on CORDIC Algorithm for FFT Application
CORDIC plural-multiplier is the key module to affecting the speed and accuracy of FFT processor. Considering these demands, the problem of CORDIC algorithm is discussed in detail and the according optimization methods are given in this paper. Then, the hardware pipe-lining structure of the CORDIC multiplier is put forward. Comparison results about RTL simulation results with MATLAB calculation indicate that the design is feasible and practical.
Hardware Efficient Architecture for Generating Sine/Cosine Waves×
Hardware Efficient Architecture for Generating Sine/Cosine Waves
This paper presents a hardware efficient architecture for generating sine and cosine waves based on the CORDIC (Coordinate Rotation Digital Computer) algorithm. In its original form the CORDIC suffers from major drawbacks like scale-factor calculation, latency and optimal selection of micro-rotations. The proposed algorithm overcomes all these drawbacks. We use leading-one bit detection technique to identify the microrotations. The scalefree design of the proposed algorithm is based on Taylor series expansion of the sine and cosine waves. The 16-bit iterative architecture achieves approximately 4.5% and 6.7% lower slice-delay product as compared to the other existing designs. The algorithm design and its VLSI implementation are detailed.
FPGA Implementation of Sine and Cosine Value Generators using Cordic Algorithm for Satellite Attitude Determination and Calculators×
FPGA Implementation of Sine and Cosine Value Generators using Cordic Algorithm for Satellite Attitude Determination and Calculators
Now-a-days various Digital Signal Processing systems are implemented on a platform of programmable signal processors or on application specific VLSI chips. Coordinate Rotation DIgital Computer (CORDIC) algorithm has turned out to be such kind of programmable signal processor. In recent times, it has been a widely researched topic in the field of vector rotated Digital Signal Processing (DSP) applications due to its simplicity. This paper presents the design of pipelined architecture for coordinate rotation algorithm for the computation of loop performance of complex Digital Phase Locked Loop (DPLL) in In-phase and quadrature channel receiver. The design of CORDIC in the vector rotation mode results in high system throughput due to its pipelined architecture where latency is reduced in each of the pipelined stage. For on-chip application, the area reduction in proposed design can is achieved through optimization in the number of micro rotations. For better loop performance of first order complex DPLL and to minimize quantization error, the numbers of iterations are also optimized.
Design and Implementation of CORDIC Processor for Complex DPLL×
Design and Implementation of CORDIC Processor for Complex DPLL
This paper presents an area-time efficient CORDIC algorithm that completely eliminates the scale-factor. By suitable selection of the order of approximation of Taylor series the proposed CORDIC circuit meets the accuracy requirement, and attains the desired range of convergence. Besides we have proposed an algorithm to redefine the elementary angles for reducing the number of CORDIC iterations. A generalized micro-rotation selection technique based on high speed most-significant-1-detection obviates the complex search algorithms for identifying the micro-rotations. The proposed CORDIC processor provides the flexibility to manipulate the number of iterations depending on the accuracy, area and latency requirements. Compared to the existing recursive architectures the proposed one has 17% lower slice-delay product on Xilinx Spartan XC2S200E device.
Approach lightning system/pilot controlled lightning at airport runway for energy conservation×
Approach lightning system/pilot controlled lightning at airport runway for energy conservation
Pilot Controlled Lighting (PCL), also known as Aircraft Radio Control of Aerodrome Lighting (ARCAL) or Pilot Activated Lighting (PAL), is a system which allows aircraft pilots to control the lighting of an airport or airfield's approach lights, runway edge lights, and taxiways via radio. At some airfields, the aerodrome beacon may also be ARCAL controlled. ARCAL is most common Anton or little-used airfields where it is neither economical to light the runways all night, nor to provide staff to turn the runway lighting on and off. It
enables pilots to control the lighting only when required, saving electricity and reducing light pollution. The ARCAL frequency for most aerodromes is usually the same as the UNICOM/CTAF frequency, although in some rare cases, a second ARCAL frequency may be designated to control the lighting for a second runway separately (an example of this is runway 01/19 at the airport in Sydney, NS). To activate the lights, the pilot clicks the radio transmit switch on the ARCAL frequency a certain number of times within a specified number of seconds. There are two type of ARCAL systems, type J and type K. When either type of system is activated, a 15-minute countdown starts, after which the lights turn off. While the lights are on, whenever a lighting command is issued, whether it changes the lighting intensity or not, the 15-minute countdown is reset. At some airfields, the lights may flash once to warn pilots that the lights are about to go off, before turning off two minutes later.When using ARCAL, it is strongly recommended that aircraft on final approach to the airfield issue a fresh lighting command, even if the lights are already on (especially if the lights were activated by another aircraft). This is so that the lighting does not turn off at a critical moment (such as when crossing the runway threshold).